Wednesday, September 11, 2019

Computer Systems Architecture and Administration Assignment

Computer Systems Architecture and Administration - Assignment Example There are three mechanisms to the performance of processing interrupts. The leading element is the amount of time taken between when the processor receives an interrupt request and when the processor takes action to initiate processing the interrupt service routine. This interruption is referred to as interrupt latency. The second element of interrupt is the interrupt processing time. It denotes the amount of time that the processor spends when practically saving the machine state of the interrupted task and diverting the interrupt service routine execution. Usually the amount of machine state saved is minimal, on the presumption that the interrupt service. The last element of interrupt service performance is the state saving overhead. This underlines the amount of time consumed when saving machine registers, but which must be saved so that the interrupt service routine to do its job. c. Caching is beneficial in several ways including: latency is abridged for active data resulting in higher application performance levels. Further, the I/O operations to external storage are minimized because most the I/O is diverted to cache. Subsequently this leads to lower levels of SAN traffic and disagreement. a. For a program to be executed it is required that it be first stored in main memory. Subsequently, after the program is loaded in the memory, a program execution starts through the delivery its start address to the CPU, which then sends instruction address to the memory unit.

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